1. Field of the Invention
The present invention relates to a method of etching an object to be processed including oxide or nitride portion, for example a semiconductor element having oxide or nitride film.
2. Description of the Related Art
An integration density of an integrated circuit which is the core of the microelectronics has been increased year by year. As the integration density is increased, a pattern width is decreased, and a pattern depth is increased. In order to cope with this, a dry etching method performed under a low pressure (high vacuum) is developed (Published Unexamined Japanese Patent Application Nos. 61-256727 and 62-194623) as a thin film processing technique.
As the dry etching method, there are a plasma etching method, a sputter etching method, an ECR etching method, a magnetron etching method, and an ion beam etching method.
When a semiconductor element is processed by these dry etching methods, an etching rate is increased by using a gas containing a halogen element such as a Freon gas. For this reason, this method is applied to a reactive ion etching method (RIE). According to the RIE method, anisotropic etching can be performed while a ratio (selection ratio) of a etching rate of a sample to be etched to a etching rate of a photoresist is kept high. Since a high etching rate can be obtained, the productivity can be improved.
However, in a conventional RIE method, when an SiO.sub.2 thin film which is an important material of a semiconductor element is to be etched to form a contact hole, a maximum selection ratio (a ratio of an etching rate (E/R) of an Si substrate to an etching rate of the SiO.sub.2 film formed thereon) is a maximum of 13. This value indicates that the silicon substrate is etched at a 1/13 rate of the etching rate of the SiO.sub.2 film after a contact hole is formed. Since the etching rate and the thickness of the SiO.sub.2 have variations, an overetching process must be performed for a predetermined period to reliably form a contact hole. Therefore, the Si substrate is inevitably etched to some extent.
In a semiconductor element such as a MOSLSI element, as an integration density is increased, the depth of a p-n junction layer formed below a contact hole must be decreased. Therefore, etching is disadvantageously performed to an Si substrate to reach the p-n junction during an overetching process.